Integrated circuits used in military applications must meet MIL-STD 883B, which specifies the Human Body Model ESD (Electro-Static Discharge) test model to determine the amount of electrostatic discharge that an integrated circuit can absorb without damage. Since electrostatic discharge is imparted to the integrated circuits during normal handling of the chips, and to the boards containing the integrated circuits chips, it is desirable that the integrated circuits be able to absorb as much electrostatic discharge as possible.
The use of silicides in semiconductor manufacturing has increased the likelihood of a high electrostatic discharge resulting in voltage which causes damage to one of the output transistors connected to the input or output pins of an integrated circuit. The ESD problem is further aggravated by a move toward increasing current levels specified by the industry.
The ESD problem arises when one transistor attempts to sink all the current generated by an electrostatic discharge. Even with output buffers having several transistors, it is likely that one transistor will conduct before the others, and therefore will sink the majority of the current.
Therefore, a need has arisen in the industry for a circuit to protect the transistors connected to the input and output pins of an integrated circuit from electrostatic discharge.